In some conventional signal processing systems it is necessary to convert a wide range of incoming analog signal amplitudes into a user-defined signal value. In systems requiring analog signal receivers such as video systems, data storage systems, medical devices, remote sensors, and many legacy communication systems, the conversion of incoming signals to a user-defined signal value simplifies the overall system design because it makes it possible to eliminate the need to compensate for the effects of channel gain variations. The ability to provide signal processing circuits with incoming signals of fixed average power allows system designers to reduce circuit and algorithmic complexity. An automatic gain control (AGC) circuit is a front-end system component that is used to provide the necessary amplification to the incoming signal to achieve the user-defined signal value. The amplification provided by the AGC circuit is called the system gain and could either increase or decrease the signal level according to what is needed to achieve the user-defined signal value. For systems where signal processing is digitally performed, the analog-to-digital converter (ADC) is located in the AGC circuit.
FIG. 1 is a schematic block diagram of a conventional AGC circuit. Referring to FIG. 1, the AGC circuit 100 comprises an analog front-end (AFE) 102, an error measurement circuit 104, an AGC reference level circuit 106, and a loop filter circuit 108. The AFE 102 comprises an analog amplifier 110 and an ADC 112. The error measurement circuit 104 comprises an AGC measurement circuit 114 and a digital adder circuit 116.
The AFE 102 is the analog portion of AGC circuit 100. The analog amplifier 110 is a variable gain amplifier with discrete gain levels. The ADC 112 is a fixed-bit analog-to-digital converter. The error measurement circuit 104 compares a specified incoming signal amplitude parameter to a user-defined AGC reference level and generates an error signal. The AGC reference level circuit 106 provides the AGC reference level used in error measurement circuit 104. The AGC measurement circuit 114 measures the specified incoming signal amplitude parameter. The digital adder 116 compares the measured parameter and the AGC reference level. The loop filter circuit 108 generates a system time constant, the system gain, and a system gain signal to select gain level in analog amplifier 100.
In operation, the incoming analog signal is amplified by analog amplifier 110 in AFE 102. The amplified analog signal is then digitized by ADC 112 in AFE 102. A specified signal amplitude parameter is measured by AGC measurement circuit 114 in error measurement circuit 104. The measured parameter is compared to the AGC reference level provided by AGC reference level circuit 106. This comparison takes place at digital adder circuit 116. The output of digital adder circuit 116 is an error signal representative of the comparison. The error signal is used by loop filter circuit 108 to generate the time response of AGC circuit 100 and to generate a new system gain. The system gain signal is generated form the system gain and is used to select the appropriate gain level in analog amplifier 110. If the measured parameter and the AGC reference level were the same, or were within a specified error range, the error signal will not produce a change in system gain and the gain level in analog amplifier 110 will not change. If the measured parameter and the AGC reference level were not the same, or were outside a specified error range, the loop filter circuit 108 generates a new system gain and system gain signal and the gain level in analog amplifier 110 is updated to reflect this new system gain.
The system gain in AGC circuit 100 is implemented entirely by the gain level selected in analog amplifier 110. Analog amplifier 100 must have very high gain resolution for AGC circuit 100 to achieve the desired user-defined signal value for a wide range of incoming analog signals. High resolution requires a large number of analog gain levels from which the appropriate analog gain may be selected by loop filter circuit 108. However, one of the difficulties is that the chip area required by analog amplifier 110 increases with the number of gain levels that it is designed to provide. The design of analog amplifiers in integrated circuits (IC) generally requires large areas on chip because of the large currents needed to drive high-capacitance loads at fast slew rates while providing high gains. The larger the number of gain levels, the larger the number of current driving elements that are needed to provide the desired resolution. Moreover, the complexity and size of the design is dependent on system requirements such as temperature stability, linearity, accuracy, low noise, wide bandwidth, and limiting the effects of voltage supply variations. The cost benefit associated with designing ever more complex digital signal processing circuits into smaller chip areas may be negated by the large area requirements of high gain resolution analog amplifiers. The large area needed by analog amplifier 110 in AGC circuit 100 thus limits the amount of chip area that may be used for digital signal processing circuits and for other chip components, for example, embedded memory, core processor units, and communication interfaces.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.